Gpio Registers; Gpio Port Mode Register (Gpiox_Moder) (X = A..d, F; Gpio Port Output Type Register (Gpiox_Otyper) (X = A..d, F - STMicroelectronics STM32F05 series Reference Manual

RM0091
8.4

GPIO registers

This section gives a detailed description of the GPIO registers.
For a summary of register bits, register address offsets and reset values, refer to
The peripheral registers can be written in word, half word or byte mode.
8.4.1

GPIO port mode register (GPIOx_MODER) (x = A..D, F)

Address offset: 0x00
Reset values:
●
0x2800 0000 for port A
●
0x0000 0000 for other ports
31 30 29 28
MODER15[1:0] MODER14[1:0]
rw rw rw rw
15 14 13 12
MODER7[1:0] MODER6[1:0]
rw rw rw rw
Bits 2y+1:2y MODERy[1:0]: Port x configuration bits (y = 0..15)
8.4.2

GPIO port output type register (GPIOx_OTYPER) (x = A..D, F)

Address offset: 0x04
Reset value: 0x0000 0000
31 30 29 28
Res Res Res Res
14 13 12
OT15 OT14 OT13 OT12
rw rw rw rw
Bits 31:16 Reserved, must be kept at reset value.
Bits 15:0 OTy[1:0]: Port x configuration bits (y = 0..15)
27 26 25
MODER13[1:0] MODER12[1:0]
rw rw rw
11 10 9
MODER5[1:0] MODER4[1:0]
rw rw rw
These bits are written by software to configure the I/O mode.
00: Input mode (reset state)
01: General purpose output mode
10: Alternate function mode
11: Analog mode
27 26 25
Res Res Res
11 10 9
OT11 OT10 OT9
rw rw rw
These bits are written by software to configure the I/O output type.
0: Output push-pull (reset state)
1: Output open-drain
Doc ID 018940 Rev 1
24 23 22 21
MODER11[1:0] MODER10[1:0]
rw rw rw rw
8 7 6 5
MODER3[1:0] MODER2[1:0]
rw rw rw rw
24 23 22 21
Res Res Res Res
8 7 6 5
OT8 OT7 OT6 OT5
rw rw rw rw
General-purpose I/Os (GPIO)
Table
20 19 18 17
MODER9[1:0] MODER8[1:0]
rw rw rw rw
4 3 2 1
MODER1[1:0] MODER0[1:0]
rw rw rw rw
20 19 18 17
Res Res Res Res
4 3 2 1
OT4 OT3 OT2 OT1
rw rw rw rw
21.
16
rw
0
rw
16
Res
0
OT0
rw
127/742