Direct Memory Access Controller (Dma); Dma Introduction; Dma Main Features - STMicroelectronics STM32F05 series Reference Manual

Direct memory access controller (DMA)

10 Direct memory access controller (DMA)
10.1

DMA introduction

Direct memory access (DMA) is used in order to provide high-speed data transfer between
peripherals and memory as well as memory to memory. Data can be quickly moved by DMA
without any CPU actions. This keeps CPU resources free for other operations.
The DMA controller has 5 channels in total, each dedicated to managing memory access
requests from one or more peripherals. It has an arbiter for handling the priority between
DMA requests.
10.2

DMA main features

●
5 independently configurable channels (requests)
●
Each channel is connected to dedicated hardware DMA requests, software trigger is
also supported on each channel. This configuration is done by software.
● Priorities between requests from channels of one DMA are software programmable (4
levels consisting of very high, high, medium, low) or hardware in case of equality
(request 1 has priority over request 2, etc.)
●
Independent source and destination transfer size (byte, half word, word), emulating
packing and unpacking. Source/destination addresses must be aligned on the data
size.
●
Support for circular buffer management
●
3 event flags (DMA Half Transfer, DMA Transfer complete and DMA Transfer Error)
logically ORed together in a single interrupt request for each channel
●
Memory-to-memory transfer
●
Peripheral-to-memory and memory-to-peripheral, and peripheral-to-peripheral
transfers
● Access to Flash, SRAM, APB and AHB peripherals as source and destination
●
Programmable number of data to be transferred: up to 65536
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