Tim2 And Tim3 Functional Description; Time-Base Unit; Figure 91. General-Purpose Timer Block Diagram (Tim2 And Tim3) - STMicroelectronics STM32F05 series Reference Manual

RM0091

Figure 91. General-purpose timer block diagram (TIM2 and TIM3)

TIMx_ETR
TIMx_CH1
TIMx_CH2
TIMx_CH3
TIMx_CH4
Notes:
Reg
16.3

TIM2 and TIM3 functional description

16.3.1

Time-base unit

The main block of the programmable timer is a 16-bit/32-bit counter with its related auto-
reload register. The counter can count up but also down or both up and down. The counter
clock can be divided by a prescaler.
The counter, the auto-reload register and the prescaler register can be written or read by
software. This is true even when the counter is running.
The time-base unit includes:
●
Counter Register (TIMx_CNT)
● Prescaler Register (TIMx_PSC):
●
Auto-Reload Register (TIMx_ARR)
Internal Clock (CK_INT)
TIMxCLK from RCC
ETR
ITR0
ITR1
ITR2
ITR3
TI1FP1
TI1
XOR
Input filter &
TI1FP2
edge detector
TRC
TI2FP1
TI2
Input filter &
TI2FP2
edge detector
TRC
TI3FP3
TI3
Input filter &
TI3FP4
edge detector
TRC
TI4FP3
TI4
Input filter &
TI4FP4
edge detector
TRC
Preload registers transferred
to active registers on U event
according to control bit
event
interrupt & DMA output
Doc ID 018940 Rev 1
General-purpose timers (TIM2 and TIM3)
ETRP
Polarity selection & edge
Input filter
detector & prescaler
ITR
TRC
TI1F_ED
TI1FP1
TI2FP2
U
Stop, clear or up/down
CK_PSC CK_CNT
PSC
+/-
Prescaler
CC1I
IC1 U
IC1PS
Prescaler
CC2I
IC2 U
IC2PS
Prescaler
CC3I
U
IC3
IC3PS
Prescaler
CC4I
U
IC4
IC4PS
Prescaler
ETRF
TRGO
Trigger
TGI to other timers
controller
to DAC/ADC
TRGI
Slave
Reset, enable, up/down, count,
mode
controller
Encoder
Interface
Autoreload register
UI
U
CNT
counter
CC1I
output
OC1REF
Capture/compare 1 register
control
CC2I
output
OC2REF
Capture/compare 2 register
control
CC3I
output
OC3REF
Capture/compare 3 register
control
CC4I
output
OC4REF
Capture/compare 4 register
control
ETRF
OC1
TIMx_CH1
OC2
TIMx_CH2
OC3
TIMx_CH3
OC4
TIMx_CH4
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