Tim1 Register Map; Table 46. Tim1 Register Map And Reset Values - STMicroelectronics STM32F05 series Reference Manual

Advanced-control timers (TIM1)
15.4.21

TIM1 register map

TIM1 registers are mapped as 16-bit addressable registers as described in the table below:
Table 46. TIM1 register map and reset values
Offset Register
TIM1_CR1
0x00
Reset value
TIM1_CR2
0x04
Reset value
TIM1_SMCR
0x08
Reset value
TIM1_DIER
0x0C
Reset value
TIM1_SR
0x10
Reset value
TIM1_EGR
0x14
Reset value
TIM1_CCMR1
Output compare
mode
Reset value
0x18
TIM1_CCMR1
Input capture
mode
Reset value
TIM1_CCMR2
Output compare
mode
Reset value
0x1C
TIM1_CCMR2
Input capture
mode
Reset value
TIM1_CCER
0x20
Reset value
TIM1_CNT
0x24
Reset value
TIM1_PSC
0x28
Reset value
TIM1_ARR
0x2C
Reset value
TIM1_RCR
0x30
Reset value
290/742
0
0
IC2F[3:0]
0
0
IC4F[3:0]
0
0
0
0
Doc ID 018940 Rev 1
CKD CMS
[1:0] [1:0]
0 0 0 0
MMS[2:0]
0 0 0 0 0 0 0 0 0
ETPS
ETF[3:0]
[1:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0
0 0
OC2M CC2S
[2:0] [1:0]
0 0 0 0 0 0 0 0 0
IC2
CC2S
PSC IC1F[3:0]
[1:0]
[1:0]
0 0 0 0 0 0 0 0 0
OC4M CC4S
[2:0] [1:0]
0 0 0 0 0 0 0 0 0
IC4
CC4S
PSC IC3F[3:0]
[1:0]
[1:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
CNT[15:0]
0 0 0 0 0 0 0 0 0
PSC[15:0]
0 0 0 0 0 0 0 0 0
ARR[15:0]
0 0 0 0 0 0 0 0 0
0 0
RM0091
0 0 0 0 0 0
0 0 0 0 0
TS[2:0] SMS[2:0]
0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
OC1M CC1S
[2:0] [1:0]
0 0 0 0 0 0
IC1
CC1S
PSC
[1:0]
[1:0]
0 0 0 0 0 0
OC3M CC3S
[2:0] [1:0]
0 0 0 0 0 0
IC3
CC3S
PSC
[1:0]
[1:0]
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
REP[7:0]
0 0 0 0 0 0