Figure 141. Counter Timing Diagram, Internal Clock Divided By 2; Figure 142. Counter Timing Diagram, Internal Clock Divided By 4; Figure 143. Counter Timing Diagram, Internal Clock Divided By N - STMicroelectronics STM32F05 series Reference Manual

RM0091

Figure 141. Counter timing diagram, internal clock divided by 2

Figure 142. Counter timing diagram, internal clock divided by 4

Figure 143. Counter timing diagram, internal clock divided by N

CK_PSC
CNT_EN
Timer clock = CK_CNT
Counter register
Counter overflow
Update event (UEV)
Update interrupt flag (UIF)
CK_PSC
CNT_EN
Timer clock = CK_CNT
Counter register
Counter overflow
Update event (UEV)
Update interrupt flag (UIF)
CK_PSC
Timer clock = CK_CNT
Counter register
Counter overflow
Update event (UEV)
Update interrupt flag (UIF)
Doc ID 018940 Rev 1
General-purpose timer (TIM14)
0034
0035 0036 0000 0001 0002 0003
0035 0036
1F 20
0000 0001
00
357/742