Figure 10. Clock Tree - STMicroelectronics STM32F05 series Reference Manual

RM0091

Figure 10. Clock tree

8 MHz
HSI RC
PLLSRC
/2,/3,...
/16
OSC_OUT
4-32 MHz
HSE OSC
OSC_IN
OSC32_IN
LSE OSC
32.768kHz
OSC32_OUT
LSI RC
40kHz
Main clock
output
MCO
1. For full details about the internal and external clock source characteristics, please refer to the "Electrical characteristics"
section in your device datasheet.
HSI
/2
SW
PLLMUL
HSI
PLL
PLLCLK
prescaler
x2,x3,..
/1,2,..512
x16
HSE
SYSCLK
CSS
14 MHz
HSI14 RC
/32
RTCCLK
LSE
RTCSEL[1:0]
LSI
/2 PLLCLK
HSI
HSI14
HSE
SYSCLK
MCO
Doc ID 018940 Rev 1
HSI
SYSCLK
LSE
/256
HCLK
/8
AHB APB
AHB
prescaler
/1,2,4,8,16
If (APB1 prescaler
=1) x1 else x2
ADC
Prescaler
/2,4
HSI14
PCLK
SYSCLK
HSI
to RTC
LSE
to IWWDG
IWWDGCLK
Reset and clock control (RCC)
FLITFCLK
to Flash programming interface
to I2C1
to I2S1
to CEC
to AHB bus, core,
memory and DMA
to cortex System timer
FHCLK Cortex free running clock
PCLK
to APB peripherals
to TIM1,2,3,6,
14,15,16,17
to ADC
14 MHz max
to USART1
MS19935V1
85/742