RM0091
clock and WS signals are input from the external master connected to the I
There is then no need, for the user, to configure the clock.
The configuration steps to follow are listed below:
1.
Set the I2SMOD bit in the SPIx_I2SCFGR register to select I
2
I
S standard through the I2SSTD[1:0] bits, the data length through the DATLEN[1:0]
bits and the number of bits per channel for the frame configuring the CHLEN bit. Select
also the mode (transmission or reception) for the slave through the I2SCFG[1:0] bits in
SPIx_I2SCFGR register.
2.
If needed, select all the potential interrupt sources and the DMA capabilities by writing
the SPIx_CR2 register.
3.
The I2SE bit in SPIx_I2SCFGR register must be set.
Serial peripheral interface / inter-IC sound (SPI/I2S)
Doc ID 018940 Rev 1
2
S interface.
2
S mode and choose the
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