Figure 28. Hse32 Clock Sources - STMicroelectronics STM32WL5 Series Reference Manual

Reset and clock control (RCC)
HSE32 is controlled from the CPUs and from the sub-GHz radio (see
radio (SUBGHZ)).
HSE32 can be switched on and off using the HSEON bit in the
(RCC_CR). The HSE32 clock sources can be either an external crystal (XTAL) or an
external source including a temperature compensated crystal oscillator (TCXO). HSE32
must be enabled with the HSEON bit when used for the CPUs.
The stability of the XTAL HSE32 clock may be impacted by the sub-GHz radio, depending
on the transmit output power (max +22 dBm), heating up the device. Heating depends on
the used transmit output power and the device package. Careful PCB design using thermal
heat dissipation techniques must be applied to avoid heat transfer to the HSE32 reference
clock source. For the HSE32 frequency drift requirements related to the sub-GHz radio, see
Section 5.5.1: LoRa
The HSERDY flag in the
oscillator is stable or not. At startup, the clock is not released until this bit is set by hardware.
An interrupt can be generated if enabled in the
(RCC_CIER).
The sub-GHz radio enables HSE32 autonomously for its own purpose, independently of the
HSEON bit.
Warning:
External crystal (HSE32 crystal)
The associated hardware configuration is shown in
to the electrical characteristics section of the datasheet for more details.
292/1450
modem.
RCC clock control register (RCC_CR)
The HSE32 cannot be used in LPRun mode.

Figure 28. HSE32 clock sources

Clock source
C
Crystal
OSC_IN
OSC_IN
External
VDDTCXO
TCXO C
TCXO
RM0453 Rev 5
RCC clock interrupt enable register
Hardware configuration
tunable load
capacitors
LIN
OSC_OUT
OSC_OUT
Not
connected
External
clock source
C
LIN
OSC_IN OSC_OUT
C
Not connected
Note: Force SUBGHZ_HSEINTRIMR = 0x00
R
to get C = 11.3 pF.
LIN
Figure 28: HSE32 clock
RM0453
Section 5: Sub-GHz
RCC clock control register
indicates if the HSE32
C
LOUT
MSv62606V2
sources. Refer