Section 19 Keyboard Buffer Control Unit (Ps2); Features - Renesas H8S/2100 Series Hardware Manual

Section 19 Keyboard Buffer Control Unit (PS2)

Section 19 Keyboard Buffer Control Unit (PS2)
This LSI has four on-chip keyboard buffer control unit (PS2) channels. The PS2 is provided with
functions conforming to the PS/2 interface specifications.
Data transfer using the PS2 employs a data line (KD) and a clock line (KCLK), providing
economical use of connectors, board surface area, etc. Figure 19.1 shows a block diagram of the
PS2.
19.1

Features

• Conforms to PS/2 interface specifications
• Direct bus drive (via the KCLK and KD pins)
• Interrupt sources: on completion of data reception/transmission, on detection of clock falling
edge, and on detection of the first falling edge of a clock
• Error detection: parity error, stop bit monitoring, and receive notify monitoring
Rev. 1.00 Apr. 28, 2008 Page 587 of 994
REJ09B0452-0100