Timing Of Output Compare Flag (Ocf) Setting; Timing Of Frc Overflow Flag Setting; Figure 12.12 Timing Of Output Compare Flag (Ocfa Or Ocfb) Setting - Renesas H8S/2158 User Manual

16-bit single-chip microcomputer h8s family/h8s/2100 series
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12.5.7

Timing of Output Compare Flag (OCF) setting

The output compare flag, OCFA or OCFB, is set to 1 by a compare-match signal generated when
the FRC value matches the OCRA or OCRB value. This compare-match signal is generated at the
last state in which the two values match, just before FRC increments to a new value. When the
FRC and OCRA or OCRB value match, the compare-match signal is not generated until the next
cycle of the clock source. Figure 12.12 shows the timing of setting the OCFA or OCFB flag.
φ
FRC
OCRA, OCRB
Compare-match
signal
OCFA, OCFB

Figure 12.12 Timing of Output Compare Flag (OCFA or OCFB) Setting

12.5.8

Timing of FRC Overflow Flag Setting

The FRC overflow flag (OVF) is set to 1 when FRC overflows (changes from H'FFFF to H'0000).
Figure 12.13 shows the timing of setting the OVF flag.
Section 12 16-Bit Free-Running Timer (FRT)
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Rev. 3.00 Jan 25, 2006 page 305 of 872
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