Table 259. Spi/I2S Register Map And Reset Values - STMicroelectronics STM32WL5 Series Reference Manual

RM0453
37.9.10 SPI/I2S register map
Table 259
Offset
0x00
0x04
0x08
0x0C
0x10
0x14
0x18
0x1C
0x20
Refer to
Serial peripheral interface / integrated interchip sound (SPI/I2S)
shows the SPI/I2S register map and reset values.

Table 259. SPI/I2S register map and reset values

Register name
reset value
SPIx_CR1
Reset value
SPIx_CR2
Reset value
SPIx_SR
Reset value
SPIx_DR
Reset value
SPIx_CRCPR
Reset value
SPIx_RXCRCR
Reset value
SPIx_TXCRCR
Reset value
SPIx_I2SCFGR
Reset value
SPIx_I2SPR
Reset value
Section 2.6 on page 71
0 0 0 0 0 0
DS[3:0]
0 0 0 0 1
0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0
for the register boundary addresses.
RM0453 Rev 5
BR [2:0]
0 0 0 0 0 0
1 1 0 0 0 0
0 0 0 0 0 0
DR[15:0]
0 0 0 0 0 0
CRCPOLY[15:0]
0 0 0 0 0 0
RXCRC[15:0]
0 0 0 0 0 0
TXCRC[15:0]
0 0 0 0 0 0
0 0 0 0 0
I2SDIV[7:0]
0 0 0 0 0 0
0 0 0 0
0 0 0 0
0 0 1 0
0 0 0 0
0 1 1 1
0 0 0 0
0 0 0 0
0 0 0 0
0 0 1 0
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