Table 247. Spi/I2S Register Map And Reset Values - STMicroelectronics STM32WLEx Reference Manual

Serial peripheral interface / integrated interchip sound (SPI/I2S)
35.9.10 SPI/I2S register map
Table 247
Offset Register
SPIx_CR1
0x00
Reset value
SPIx_CR2
0x04
Reset value
SPIx_SR
0x08
Reset value
SPIx_DR
0x0C
Reset value
SPIx_CRCPR
0x10
Reset value
SPIx_RXCRCR
0x14
Reset value
SPIx_TXCRCR
0x18
Reset value
SPIx_I2SCFGR
0x1C
Reset value
SPIx_I2SPR
0x20
Reset value
Refer to
1212/1306
shows the SPI/I2S register map and reset values.

Table 247. SPI/I2S register map and reset values

Section 2.4 on page 62
0 0
0
0 0
0 0
0 0
0 0
for the register boundary addresses.
RM0461 Rev 5
BR [2:0]
0 0 0 0 0 0 0 0 0
DS[3:0]
0 0 0 1 1 1 0 0 0
0 0 0 0 0 0 0 0
DR[15:0]
0 0 0 0 0 0 0 0 0
CRCPOLY[15:0]
0 0 0 0 0 0 0 0 0
RXCRC[15:0]
0 0 0 0 0 0 0 0 0
TXCRC[15:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0
I2SDIV[7:0]
0 0 0 0 0
RM0461
0 0 0 0 0
0 0 0 0 0
0 0 0 1 0
0 0 0 0 0
0 0 1 1 1
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 1 0