Renesas H8S/2100 Series Hardware Manual page 545

Bit Bit Name
4 ICDRE
Initial
Value R/W Description
0 R Transmit Data Write Request Flag
Indicates the ICDR (ICDRT) status in transmit mode.
0: Indicates that the data has been already written to
1: Indicates that data has been transferred from ICDRT
[Setting conditions]
•
•
[Clearing conditions]
•
•
•
•
Note that if the ACKE bit is set to 1 with I
thus enabling acknowledge bit decision, ICDRE is not
set when data transmission is completed while the
acknowledge bit is 1.
When ICDRE is set due to the condition (2) above,
ICDRE is temporarily cleared to 0 when data is written
to ICDR (ICDRT); however, since data is transferred
from ICDRT to ICDRS immediately, ICDRE is set to 1
again. Do not write data to ICDR when TRS = 0
because the ICDRE flag value is invalid during the
time.
ICDR (ICDRT) or ICDR is initialized.
to ICDRS and is being transmitted, or the start
condition has been detected or transmission has
been complete, thus allowing the next data to be
written to.
When the start condition is detected from the bus
2
line state with I C bus format or serial format.
When data is transferred from ICDRT to ICDRS.
1. When data transmission completed while
ICDRE = 0 (at the rise of the 9th clock pulse).
2. When data is written to ICDR in transmit mode
after data transmission was completed while
ICDRE = 1.
When data is written to ICDR (ICDRT).
When the stop condition is detected with I
format or serial format.
When 0 is written to the ICE bit.
When the IIC is internally initialized using the CLR3
to CLR0 bits in DDCSWR.
Rev. 1.00 May 09, 2008 Page 519 of 954
2
Section 17 I C Bus Interface (IIC)
2
C bus
2
C bus format
REJ09B0462-0100