Table of Contents
Advertisement
Section 24 Flash Memory
(b) Programming
FPFR indicates the return value of the programming result.
Bit
Bit Name
7
6
MD
5
EE
4
FK
3
Rev. 1.00 May 09, 2008 Page 736 of 954
REJ09B0462-0100
Initial
Value
R/W
Description
Unused
Returns 0.
R/W
Programming Mode Related Setting Error Detect
Detects the error protection state and returns the result.
When the error protection state is entered, this bit is set
to 1. Whether the error protection state is entered or not
can be confirmed with the FLER bit in FCCS. For
conditions to enter the error protection state, see section
24.9.3, Error Protection.
0: Normal operation (FLER = 0)
1: Error protection state, and programming cannot be
R/W
Programming Execution Error Detect
Writes 1 to this bit when the specified data could not be
written because the user MAT was not erased. If this bit
is set to 1, there is a high possibility that the user MAT
has been written to partially. In this case, after removing
the error factor, erase the user MAT. Also an attempt to
write the user MAT when the FMATS value is H'AA and
the user boot MAT is selected leads to a programming
execution error. In that case, both the user MAT and
user boot MAT are not rewritten. Writing to the user boot
MAT must be performed in boot mode or programmer
mode.
0: Programming has ended normally.
1: Programming has ended abnormally. (programming
R/W
Flash Key Register Error Detect
Checks the FKEY value (H'5A) before programming
starts, and returns the result.
0: FKEY setting is normal. (H'5A)
1: FKEY setting is abnormal. (value other than H'5A)
Unused
Returns 0.
performed (FLER = 1)
result is not guaranteed.)
Advertisement
Table of Contents
