Pec Calculation Data Re-Entry Register (Pecy); Pec Calculation Result Output Register (Pecz) - Renesas H8S/2100 Series Hardware Manual

6-bit single-chip microcomputer
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18.3.2

PEC Calculation Data Re-entry Register (PECY)

PECY is a register in which the previous PECZ content is reentered as the PEC calculation is
performed on multiple bytes of data.
When data is written to PECX, the PECZ content is transferred to PECY at the same time.
Bit
Bit Name
7 to 0
PECY7 to
PECY0
18.3.3

PEC Calculation Result Output Register (PECZ)

PECZ holds the result of CRC-8 calculation from the contents of PECX and PECY.
Bit
Bit Name
7 to 0
PECZ7 to
PECZ0
Initial
Value
R/W
Description
All 0
R/W
PEC Calculation Re-entry Data 7 to 0
These bits store data that has been transferred from
PECZ for the PEC calculation.
Initial
Value
R/W
Description
All 0
R
PEC Calculation Output Data 7 to 0
These bits hold the result of PEC calculation.
Section 18 SMBus 2.0 Interface (SMBUS)
Rev. 1.00 May 09, 2008 Page 549 of 954
REJ09B0462-0100

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