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Section 24 Flash Memory
(2)
Download of On-Chip Program
The on-chip program is automatically downloaded by setting the flash key code register (FKEY)
and the SCO bit in the flash code control/status register (FCCS). The memory MAT is replaced
with the embedded program storage area during download. Since the memory MAT cannot be
read during programming/erasing, the procedure program must be executed in a space other than
the flash memory (for example, on-chip RAM). Since the download result is returned to the
programming/erasing interface parameter, whether download is normally executed or not can be
confirmed.
(3)
Initialization of Programming/Erasing
A pulse with the specified period must be applied when programming or erasing. The specified
pulse width is made by the method in which wait loop is configured by the CPU instruction.
Accordingly, the operating frequency of the CPU needs to be set before programming/erasing. The
operating frequency of the CPU is set by the programming/erasing interface parameter.
(4)
Execution of Programming/Erasing
The start address of the programming destination and the program data are specified in 128-byte
units when programming. The block to be erased is specified with the erase block number in
erase-block units when erasing. Specifications of the start address of the programming destination,
program data, and erase block number are performed by the programming/erasing interface
parameters, and the on-chip program is initiated. The on-chip program is executed by using the
JSR or BSR instruction and executing the subroutine call of the specified address in the on-chip
RAM. The execution result is returned to the programming/erasing interface parameter.
The area to be programmed must be erased in advance when programming flash memory. All
interrupts are disabled during programming/erasing.
(5)
When Programming/Erasing is Executed Consecutively
When processing does not end by 128-byte programming or 1-block erasure, consecutive
programming/erasing can be realized by updating the start address of the programming destination
and program data, or the erase block number. Since the downloaded on-chip program is left in the
on-chip RAM even after programming/erasing completes, download and initialization are not
required when the same processing is executed consecutively.
Rev. 1.00 May 09, 2008 Page 722 of 954
REJ09B0462-0100
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