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21.3.15 FSI LPC Command Status Register 2 (FSILSTR2)
FSILSTR2 indicates the LPC internal status.
Bit
Bit Name
7 to 5
4
FSIDWBUSY
3
FSIDRBUSY
2 to 0 SIZE2
SIZE1
SIZE0
R/W
Initial
Value
EC
Host Description
All 0
R/W
0
R
0
R
0
R
0
R
1
R
Reserved
The initial value should not be modified.
FSI Direct Write Busy Flag
Indicates a FSI write transfer status during LPC-
SPI direct transfer.
0: FSI write transfer is completed.
1: During FSI write transfer
FSI Direct Read Busy Flag
Indicates a FSI read transfer status during LPC-
SPI direct transfer.
0: FSI read transfer is completed.
1: During FSI read transfer
Transfer Byte Count Monitor
Indicates the number of transferred bytes when
data is received in the LPC/FW memory cycles.
When the Byte/Page-Program or AAI-Program
instruction is executed from the EC CPU, the
number of transferred bytes can be confirmed by
these bits.
001: LPC/FW memory cycle (byte transfer)
010: FW memory cycle (word transfer)
100: FW memory cycle transfer (longword
transfer)
When a transfer is made in units other than
byte/word/longword, the previous value is
retained.
Note: This bit is not set to the value other than
above.
Rev. 1.00 May 09, 2008 Page 665 of 954
Section 21 FSI Interface
REJ09B0462-0100
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