Renesas H8S/2100 Series Hardware Manual page 644

Section 20 LPC Interface (LPC)
Bit Bit Name Initial Value Slave Host Description
3 IRQ11E2 0
2 IRQ10E2 0
Rev. 1.00 May 09, 2008 Page 618 of 954
REJ09B0462-0100
R/W

R/W Host IRQ11 Interrupt Enable 2
Enables or disables an HIRQ11 interrupt request
when OBF2 is set by an oDR2 write.
0: HIRQ11 interrupt request by OBF2 and IRQE11E2
is disabled.
[Clearing conditions]
•
Writing 0 to IRQ11E2
•
LPC hardware reset, LPC software reset
•
Clearing OBF2 to 0 (when IEDIR2 = 0)
1: [When IEDIR2 = 0]
HIRQ11 interrupt request by setting OBF2 to 1 is
enabled.
[When IEDIR2 = 1]
HIRQ11 interrupt is requested.
[Setting condition]
Writing 1 after reading IRQ11E2 = 0

R/W Host IRQ10 Interrupt Enable 2
Enables or disables an HIRQ10 interrupt request
when OBF2 is set by an ODR2 write.
0: HIRQ10 interrupt request by OBF2 and IRQE10E2
is disabled.
[Clearing conditions]
•
Writing 0 to IRQ10E2
•
LPC hardware reset, LPC software reset
•
Clearing OBF2 to 0 (when IEDIR2 = 0)
1: [When IEDIR2 = 0]
HIRQ10 interrupt request by setting OBF2 to 1 is
enabled.
[When IEDIR2 = 1]
HIRQ10 interrupt is requested.
[Setting condition]
Writing 1 after reading IRQ10E2 = 0