Renesas H8S/2100 Series Hardware Manual page 595

6-bit single-chip microcomputer
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Start
Receive state
Read KBCRL
KBF = 0
Yes
Read KBCRH
RXCR3 to RXCR0 ≥
B'1001
Yes
[3]
Disable receive abort
requests
Figure 19.7 Sample Receive Abort Processing Flowchart (1)
No
[1]
Processing 1
No
KCLKO = 0
(receive abort request)
Retransmit
command transmission
(data)
Yes
KBE = 0
(disable KBBR reception
and clear receive counter)
Set start bit
(KDO = 0)
Clear I/O inhibit
(KCLKO = 1)
Transmit data
To transmit operation
Section 19 Keyboard Buffer Control Unit (PS2)
[1] Read KBCRL, and if KBF = 1,
perform processing 1.
[2] Read KBCRH, and if the value of
bits RXCR3 to RXCR0 is less
than B'1001, write 0 in KCLKO to
abort reception.
[3] If the value of bits RXCR3 to
RXCR0 is B'1001 or greater, wait
until stop bit reception is
completed, then perform receive
data processing, and proceed to
the next operation.
If the value of bits RXCR3 to
RXCR0 is B'1001 or greater, the
parity bit is being received. With
the PS2 interface, a receive abort
request following parity bit
reception is disabled. Wait until
[2]
stop bit reception is completed,
perform receive data processing
and clear the KBF flag, then
proceed to the next operation.
No
KBE = 0
(disable KBBR reception
and clear receive counter)
KBE = 1
(enable KB operation)
Clear I/O inhibit
(KCLKO = 1)
To receive operation
Rev. 1.00 May 09, 2008 Page 569 of 954
REJ09B0462-0100

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