Renesas H8S/2100 Series Hardware Manual page 429

6-bit single-chip microcomputer
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Synchronization
clock
Serial data
TDRE
TEND
TXI interrupt request
generated
Figure 14.16 Sample SCI Transmission Operation in Clocked Synchronous Mode
Initialization
Start transmission
Read TDRE flag in SSR
TDRE = 1
Write transmit data to TDR and
clear TDRE flag in SSR to 0
All data transmitted
Read TEND flag in SSR
TEND = 1
Clear TE bit in SCR to 0
End transmission
Figure 14.17 Sample Serial Transmission Flowchart
Transfer direction
Bit 0
Bit 1
Data written to TDR and
TDRE flag cleared to 0 in
TXI interrupt service
routine
1 frame
[1]
[2]
No
Yes
No
[3]
Yes
No
Yes
[4]
Section 14 Serial Communication Interface (SCI)
Bit 7
Bit 0
Bit 1
TXI interrupt request
generated
[1] SCI initialization:
The TxD pin is automatically
designated as the transmit data
output pin.
[2] SCI status check and transmit data
write:
Read SSR and check that the TDRE
flag is set to 1, then write transmit
data to TDR and clear the TDRE flag
to 0.
[3] Serial transmission continuation
procedure:
To continue serial transmission, be
sure to read 1 from the TDRE flag to
confirm that writing is possible, then
write data to TDR, and then clear the
TDRE flag to 0.
Note:
Do not write to SMR, SCR,
BRR, and SDCR from the
start to the end of
transmission except the
process of [4].
Rev. 1.00 May 09, 2008 Page 403 of 954
Bit 6
Bit 7
TEI interrupt request
generated
REJ09B0462-0100

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