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Section 16 Serial Communication Interface with FIFO (SCIF)
(6)
Suspension of Data Reception
Figure 16.11 shows an example of the data reception suspension flowchart.
Receive FIFO trigger level interrupt
Clear RTS bit in FMCR to 0
Read receive FIFO
Read FLSR
DR = 0
Set RTS bit in FMCR to 1
(Transmission/reception standby flow)
Figure 16.11 Example of Data Reception Suspension Flowchart
Rev. 1.00 May 09, 2008 Page 486 of 954
REJ09B0462-0100
[1]
[2]
[3]
No
Yes
[4]
[1] When data is received at a trigger level higher than
the receive FIFO trigger level specified in the
initialization flow, a receive FIFO trigger level interrupt
occurs.
[2] Clear the RTS bit in FMCR to 0.
[3] Read the receive FIFO until the DR flag is cleared to 0.
[4] Set the RTS bit in FMCR to 1, and then go to the
transmission/reception standby flow.
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