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Section 28 Electrical Characteristics
Table 28.5 Clock Timing
Condition A:
V
= 3.0 V to 3.6 V, V
CC
Condition B:
V
= 3.0 V to 3.6 V, V
CC
Item
Clock cycle time
Clock high pulse width
Clock low pulse width
Clock rise time
Clock fall time
Reset oscillation stabilization (crystal)
Software standby oscillation
stabilization time (crystal)
External clock output stabilization delay
time
Rev. 1.00 May 09, 2008 Page 924 of 954
REJ09B0462-0100
= 0 V, φ = 8 MHz to 10 MHz
SS
= 0 V, φ = 10 MHz to 25 MHz
SS
Symbol
Min.
t
100
cyc
t
30
CH
t
30
CL
t
Cr
t
Cf
t
20
OSC1
t
8
OSC2
t
500
DEXT
t
CH
φ
Figure 28.4 System Clock Timing
Condition A
Condition B
Max.
Min.
125
40
12
12
20
20
20
8
500
t
cyc
t
Cf
t
t
Cr
CL
Max.
Unit
Reference
100
ns
Figure 28.4
5
5
ms
Figure 28.5
Figure 28.6
µs
Figure 28.5
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