Renesas H8S/2100 Series Hardware Manual page 14

6-bit single-chip microcomputer
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10.5 Operation ........................................................................................................................... 253
10.5.1 Basic Functions..................................................................................................... 253
10.5.2 Synchronous Operation......................................................................................... 259
10.5.3 Buffer Operation................................................................................................... 261
10.5.4 PWM Modes......................................................................................................... 265
10.5.5 Phase Counting Mode........................................................................................... 269
10.6 Interrupts............................................................................................................................ 274
10.6.1 Interrupt Source and Priority ................................................................................ 274
10.6.2 A/D Converter Activation..................................................................................... 275
10.7 Operation Timing............................................................................................................... 276
10.7.1 Input/Output Timing ............................................................................................. 276
10.7.2 Interrupt Signal Timing ........................................................................................ 280
10.8 Usage Notes ....................................................................................................................... 283
10.8.1 Input Clock Restrictions ....................................................................................... 283
10.8.2 Caution on Period Setting ..................................................................................... 283
10.8.3 Conflict between TCNT Write and Clear Operations........................................... 284
10.8.4 Conflict between TCNT Write and Increment Operations ................................... 284
10.8.5 Conflict between TGR Write and Compare Match............................................... 285
10.8.7 Conflict between TGR Read and Input Capture ................................................... 286
10.8.8 Conflict between TGR Write and Input Capture .................................................. 286
10.8.11 Conflict between TCNT Write and Overflow/Underflow .................................... 288
10.8.12 Multiplexing of I/O Pins ....................................................................................... 289
10.8.13 Module Stop Mode Setting ................................................................................... 289
Section 11 16-Bit Cycle Measurement Timer (TCM)....................................... 291
11.1 Features.............................................................................................................................. 291
11.2 Input/Output Pins............................................................................................................... 293
11.3 Register Descriptions ......................................................................................................... 294
11.3.1 TCM Timer Counter (TCMCNT)......................................................................... 295
11.3.2 TCM Cycle Upper Limit Register (TCMMLCM) ................................................ 295
11.3.3 TCM Cycle Lower Limit Register (TCMMINCM).............................................. 296
11.3.4 TCM Input Capture Register (TCMICR).............................................................. 296
11.3.5 TCM Input Capture Buffer Register (TCMICRF) ................................................ 296
11.3.6 TCM Status Register (TCMCSR)......................................................................... 297
11.3.7 TCM Control Register (TCMCR)......................................................................... 299
11.3.8 TCM Interrupt Enable Register (TCMIER).......................................................... 301
Rev. 1.00 May 09, 2008 Page xiv of xxvi

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