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Bit
Bit Name
3
REPRCVE
2
1
CLK1
0
CLK0
15.3.2
Receive Control Register 2 (CCR2)
CCR2 consists of the bits that select the CIR communication format.
Bit
Bit Name
7
TFM1
6
TFM0
5 to 0
Initial
Value
R/W
Description
0
R/W
Receive Enable after Repeat Detection
Enables/disables the CIR reception after a repeat
detection.
0: The CIR reception is disabled by a repeat
detection.
1: The CIR reception is enabled by a repeat detection
1
R/W
Reserved
The initial value should not be changed.
0
R/W
Reference Clock
00: Internal clock φ
0
R/W
01: Internal clock φ/2
10: Internal clock φ/4
11: Subclock φ
Initial
Value
R/W
Description
0
R/W
Reception Signal Format Select
0
R/W
00: NEC format (4 bytes are used)
01: NEC format (2 bytes are used)
10: Setting prohibited
11: Setting prohibited
All 0
R/W
Reserved
The initial value should not be changed.
SUB
(Address, address, command, and command are
stored in CIRRDR.)
(Address and command are stored in CIRRDR.)
Rev. 1.00 May 09, 2008 Page 433 of 954
Section 15 CIR Interface
REJ09B0462-0100
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