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21.4.6 SPI Flash Memory Write Operation Mode ........................................................... 689
21.5 Reset Conditions ................................................................................................................ 690
21.6 Interrupt Sources................................................................................................................ 692
Section 22 A/D Converter..................................................................................693
22.1 Features.............................................................................................................................. 693
22.2 Input/Output Pins............................................................................................................... 695
22.3 Register Descriptions ......................................................................................................... 696
22.3.1 A/D Data Registers A to H (ADDRA to ADDRH) .............................................. 696
22.3.2 A/D Control/Status Register (ADCSR) ................................................................ 697
22.3.3 A/D Control Register (ADCR) ............................................................................. 699
22.4 Operation ........................................................................................................................... 701
22.4.1 Single Mode.......................................................................................................... 701
22.4.2 Scan Mode ............................................................................................................ 702
22.4.3 Input Sampling and A/D Conversion Time .......................................................... 703
22.5 Interrupt Source ................................................................................................................. 704
22.6 A/D Conversion Accuracy Definitions .............................................................................. 705
22.7 Usage Notes ....................................................................................................................... 707
22.7.1 Module Stop Mode Setting ................................................................................... 707
22.7.2 Permissible Signal Source Impedance .................................................................. 707
22.7.3 Influences on Absolute Accuracy ......................................................................... 708
22.7.4 Setting Range of Analog Power Supply and Other Pins....................................... 708
22.7.5 Notes on Board Design ......................................................................................... 708
22.7.6 Notes on Noise Countermeasures ......................................................................... 709
22.7.7 Module Stop Mode Setting ................................................................................... 710
22.7.8 Note on Activation of the A/D Converter by an External Trigger........................ 710
Section 23 RAM ................................................................................................713
Section 24 Flash Memory ..................................................................................715
24.1 Features.............................................................................................................................. 715
24.2 Mode Transition Diagram.................................................................................................. 717
24.3 Flash Memory MAT Configuration................................................................................... 719
24.4 Block Structure .................................................................................................................. 720
24.5 Programming/Erasing Interface ......................................................................................... 721
24.6 Input/Output Pins............................................................................................................... 723
24.7 Register Descriptions ......................................................................................................... 724
24.7.1 Programming/Erasing Interface Registers ............................................................ 726
24.7.2 Programming/Erasing Interface Parameters ......................................................... 732
Rev. 1.00 May 09, 2008 Page xxiii of xxvi
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