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9.3.3
PWM Mode Control Register C (PWMMDCR)
PWMMDCR selects the PWM count mode and operating mode for each channel.
Bit
Bit Name
7
CNTMD01B
6
CNTMD01A
5
PWMSL5
4
PWMSL4
3
PWMSL3
2
PWMSL2
Initial
Value
R/W
Description
0
R/W
Channel 0 and 1, 12-bit Counter Select
0: Channel 0 and 1 are set to 8-bit count operating
1: Channel 0 and 1 are set to 12-bit count operating
When selecting 12-bit count operating mode, 16-bit
count mode must be non-selectable (CNTMD01A =
0). For details, see table 9.3.
0
R/W
Channel 0 and 1, 16-bit Counter Select
0: Channel 0 and 1 are set to 8-bit count operating
1: Channel 0 and 1 are set to 16-bit count operating
When selecting 16-bit count operating mode, 12-bit
count mode must be non-selectable (CNTMD01B =
0). For details, see table 9.3.
0
R/W
Channel 5 Operating Mode Select
0: Single-pulse mode
1: Pulse division mode (Specify 8-bit counter mode.)
0
R/W
Channel 4 Operating Mode Select
0: Single pulse mode
1: Pulse division mode (Specify 8-bit counter mode.)
0
R/W
Channel 3 Operating Mode Select
0: Single pulse mode
1: Pulse division mode (Specify 8-bit counter mode.)
0
R/W
Channel 2 Operating Mode Select
0: Single pulse mode
1: Pulse division mode (Specify 8-bit counter mode.)
Section 9 8-Bit PWM Timer (PWMU)
mode
mode
mode
mode
Rev. 1.00 May 09, 2008 Page 205 of 954
REJ09B0462-0100
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