Renesas H8S/2100 Series Hardware Manual page 639

Bit Bit Name Initial Value Slave Host Description
4 SMIE3B 0
3 SMIE3A 0
R/W

R/W Host SMI Interrupt Enable 3B
Enables or disables an SMI interrupt request when
OBF3B is set by a TWR15 write.
0: Host SMI interrupt request by OBF3B and SMIE3B
is disabled.
[Clearing conditions]
•
Writing 0 to SMIE3B
•
LPC hardware reset, LPC software reset
•
Clearing OBF3B to 0 (when IEDIR3 = 0)
1: [When IEDIR3 = 0]
Host SMI interrupt request by setting OBF3B to 1
is enabled.
[When IEDIR3 = 1]
Host SMI interrupt is requested.
[Setting condition]
Writing 1 after reading SMIE3B = 0

R/W Host SMI Interrupt Enable 3A
Enables or disables an SMI interrupt request when
OBF3A is set by an ODR3 write.
0: Host SMI interrupt request by OBF3A and SMIE3A
is disabled.
[Clearing conditions]
•
Writing 0 to SMIE3A
•
LPC hardware reset, LPC software reset
•
Clearing OBF3A to 0 (when IEDIR3 = 0)
1: [When IEDIR3 = 0]
Host SMI interrupt request by setting is enabled.
[When IEDIR3 = 1]
Host SMI interrupt is requested.
[Setting condition]
Writing 1 after reading SMIE3A = 0
Section 20 LPC Interface (LPC)
Rev. 1.00 May 09, 2008 Page 613 of 954
REJ09B0462-0100