Renesas H8S/2100 Series Hardware Manual page 107

6-bit single-chip microcomputer
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Initial
Bit
Bit Name
Value
2
CKS2
0
1
CKS1
0
0
0
CKS0
Note:
*
Only 0 can be written to clear the flag.
• TCSR_1
Initial
Bit
Bit Name
Value R/W
7
OVF
0
R/W
Description
R/W
Clock Select 2 to 0
R/W
Selects the clock source to be input to TCNT. The overflow
frequency for φ = 20 MHz is enclosed in parentheses.
R/W
000: φ/2 (frequency: 25.6 µs)
001: φ/64 (frequency: 819.2 µs)
010: φ/128 (frequency: 1.6 µs)
011: φ/512 (frequency: 6.6 µs)
100: φ/2048 (frequency: 26.2 µs)
101: φ/8192 (frequency: 104.9 µs)
110: φ/32768 (frequency: 419.4 µs)
111: φ/131072 (frequency: 1.68 s)
Description
1
Overflow Flag
R/(W)*
Indicates that TCNT has overflowed (changes from H'FF to
H'00).
[Setting condition]
When TCNT overflows (changes from H'FF to H'00)
When internal reset request generation is selected in
watchdog timer mode, OVF is cleared automatically by the
internal reset.
[Clearing conditions]
When TCSR is read when OVF = 1*
OVF
When 0 is written to TME
Section 4 Resets
2
, then 0 is written to
Rev. 1.00 May 09, 2008 Page 81 of 954
REJ09B0462-0100

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