Section 2 CPU
2.9
Usage Note
2.9.1
TAS Instruction
The registers ER0, ER1 ER4, and ER5b must be used when using the TAS instruction.
Note that the TAS instruction is not generated in the Renesas H8S, H8S/300 series C/C++
Compiler. When using the TAS instruction as a user-defined built-in function, the registers ER0,
ER1 ER4, and ER5b must be used.
2.9.2
STM/LDM Instruction
The register ER7 cannot be used to push data onto the stack for STM instruction or to pop data off
the stack for LDM instruction stack. To push or pop data in one instruction, the registers that can
be used are two, three, or four as shown in the list below.
Two registers: ER0 to ER1, ER2 to ER3, and ER4 to ER5
Three registers: ER0 to ER2, ER4 to ER6
Four registers: ER0 to ER3
Note that the STM/LDM instruction that contains ER is not generated in the Renesas H8S,
H8S/300 series C/C++ Compiler
2.9.3
Notes on Using the Bit Operation Instruction
Instructions BSET, BCLR, BNOT, BST, and BIST read data in byte units, and write data in byte
units after bit operation. Therefore, attention must be paid when these instructions are used for
ports or registers including write-only bits.
Instruction BCLR can be used to clear the flag in the internal I/O register to 0. If it is obvious that
the flag has been set to 1 by the interrupt processing routine, it is unnecessary to read the flag
beforehand.
Rev. 1.00 May 09, 2008 Page 62 of 954
REJ09B0462-0100