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• Extended vector mode (EIVS = 1 in SYSCR3)
Interrupts KIN15 to KIN8 and KIN7 to KIN0, each form a group. The interrupt exception
handling for an interrupt request from the same group is started at the same vector address.
Interrupt requests are generated on the falling edge of pins KIN15 to KIN0.
Interrupt requests KIN15 to KIN0 can be masked by using KMIMRA and KMIMRB.
The status of interrupt requests KIN15 to KIN0 are not indicated.
An IRQ6 interrupt is enabled only by input to the ExIRQ6 pin. The IRQ6 pin is only
available for a KIN interrupt input, and functions as the KIN6 pin. The initial value of the
KMIMR6 bit is 1. For the IRQ7 interrupt, either the IRQ7 pin or ExIRQ7 pin can be
selected as the input pin using the ISS7 bit. The IRQ7 interrupt is not affected by the
settings of bits KMIMR15 to KMIMR8. The detection of interrupts KIN15 to KIN0 does
not depend on whether the relevant pin has been set for input or output. Therefore, when a
pin is used as an external interrupt input pin, clear the DDR bit of the corresponding port to
0 so it is not used as an I/O pin for another function.
(4)
WUE15 to WUE0 Interrupts
Interrupts WUE15 to WUE0 are requested by an input signal at pins WUE15 to WUE0. Interrupts
WUE15 to WUE0 have the following features:
WUE15 to WUE8 and WUE7 to WUE0, each form a group. The interrupt exception
handling for an interrupt request from the same group is started at the same vector address
Selecting either of the falling edge or the rising edge for interrupt request at pins WUE15 to
WUE0 can be made with WUESCR.
Interrupt requests WUE15 to WUE0 can be masked by using WUEER.
The status of interrupt requests WUE15 to WUE0 is indicated in WUESR. WUESR flags
can be cleared to 0 by software
The detection of interrupts WUE15 to WUE0 does not depend on whether the relevant pin has
been set for input or output. Therefore, when a pin is used as an external interrupt input pin, clear
the DDR bit of the corresponding port to 0 so it is not used as an I/O pin for another function.
Section 6 Interrupt Controller
Rev. 1.00 May 09, 2008 Page 121 of 954
REJ09B0462-0100
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