Port B - Renesas H8S/2100 Series Hardware Manual

8.2.11

Port B

(1) PB7/RTS/FSISS
The pin function is switched as shown below according to the combination of the SCIFE bit in
HICR5 of LPC, the FSIE bit in FSICR1 of FSI and the PB7DDR bit. SCIFOE in the following
table is expressed by the following logical expression.
SCIFOE = 1: (SCIFE • SCIFOE1 • SCIFOE0 + SCIFE • SCIFOE0)
FSIE
SCIFOE
PB7DDR
Pin function
(2) PB6/CTS/FSICK
The pin function is switched as shown below according to the combination of the FSIE bit in
FSICR1 of FSI and the PB6DDR bit.
FSIE
PB6DDR
Pin function
(3) PB5/DTR/FSIDI
The pin function is switched as shown below according to the combination of the SCIFE bit in
HICR5 of LPC, the FSIE bit in FSICR1 of FSI and the PB5DDR bit. SCIFOE in the following
table is expressed by the following logical expression.
SCIFOE = 1: (SCIFE • SCIFOE1 • SCIFOE0 + SCIFE • SCIFOE0)
FSIE
SCIFOE
PB5DDR
Pin function
0
0
PB7 input pin PB7 output pin
0
PB6 input pin
0
0
PB5 input pin PB5 output pin
0
1
RTS output pin
0
1
PB6 output pin
CTS input pin
0
1
DTR output pin
Rev. 1.00 May 09, 2008 Page 177 of 954
Section 8 I/O Ports
1

1
 
FSISS output
pin
1

FSICK output pin
1

1
 
FSIDI input pin
REJ09B0462-0100