Reset Conditions - Renesas H8S/2100 Series Hardware Manual

Section 21 FSI Interface
21.5

Reset Conditions

The FSI supports the LPC shut-down mode. The range of initialization in each mode is shown in
table 21.8.
Table 21.8 Range of Initialization of FSI in Each Mode
Register Name
FSIHBARH/ Bits 7 to 0
FSIHBARL
FSISR Bits 7 to 0
CMDHBARH/ Bits 7 to 0
CMDHBARL
FSICMDR Bits 7 to 0
FSILSTR1 Bits 7, 6, 4,
and 3
Bits 5 and 2
to 0
FSILSTR2 Bits 7 to 5
Bits 4 and 3
Bits 2 to 0
SPIGPR1 to Bits 7 to 0
SPIGPRF
SLCR Bits 7 to 0
FSIARH/ Bits 7 to 0
FSIARM/
FSIARL
FSIWDRHH/ Bits 7 to 0
FSIWDRHL/
FSIWDRLH/
FSIWDRLL
LPC internal sequencer
Rev. 1.00 May 09, 2008 Page 690 of 954
REJ09B0462-0100
System
Reset LPC Reset
Initialized Retained
Initialized Retained
Initialized Retained
Initialized Retained
Initialized Initialized
Initialized Retained
Initialized Retained
Initialized Initialized
Initialized Retained
Initialized Retained
Initialized Retained
Initialized Retained
Initialized Retained
Initialized Initialized
LPC
Shutdown LPC Abort
Retained Retained
Retained Retained
Retained Retained
Retained Retained
Retained Retained
Retained Retained
Retained Retained
Retained Retained
Retained Retained
Retained Retained
Retained Retained
Retained Retained
Retained Retained
Initialized Initialized
FSI Reset
Retained
Retained
Retained
Retained
Initialized
Retained
Retained
Initialized
Retained
Retained
Retained
Retained
Retained
Retained