Section 9 8-Bit PWM Timer (PWMU)
9.4.2
Pulse Division Mode
In pulse division mode, the higher-order four bits in PWMREG specify the duty cycle of the basic
pulse as 0/16 to 15/16 with a resolution of 1/16. The following shows the duty cycle of the basic
pulse.
Table 9.10 Basic Pulse Duty Cycle
Upper 4 bits
B'0000
B'0001
B'0010
B'0011
B'0100
B'0101
B'0110
B'0111
B'1000
B'1001
B'1010
B'1011
B'1100
B'1101
B'1110
B'1111
Rev. 1.00 May 09, 2008 Page 218 of 954
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Basic Pulse Waveform (Internal)
0 1 2 3 4 5 6 7 8 9 A B C D E F
Resolution