Stack Status After Exception Handling - Renesas H8S/2100 Series Hardware Manual

Section 5 Exception Handling
5.6

Stack Status after Exception Handling

Figure 5.2 shows the stack after completion of trap instruction exception handling and interrupt
exception handling.
SP CCR
PC
(24 bits)
Figure 5.2 Stack Status after Exception Handling
Rev. 1.00 May 09, 2008 Page 94 of 954
REJ09B0462-0100