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13.6
Usage Notes
13.6.1
Notes on Register Access
The watchdog timer's registers, TCNT and TCSR differ from other registers in being more
difficult to write to. The procedures for writing to and reading from these registers are given
below.
(1)
Writing to TCNT and TCSR (Example of WDT_0)
These registers must be written to by a word transfer instruction. They cannot be written to by a
byte transfer instruction.
TCNT and TCSR both have the same write address. Therefore, satisfy the relative condition
shown in figure 13.5 to write to TCNT or TCSR. To write to TCNT, the higher bytes must contain
the value H'5A and the lower bytes must contain the write data before the transfer instruction
execution. To write to TCSR, the higher bytes must contain the value H'A5 and the lower bytes
must contain the write data.
<TCNT write>
Address : H'FFA8
<TCSR write>
Address : H'FFA8
(2)
Reading from TCNT and TCSR (Example of WDT_0)
These registers are read in the same way as other registers. The read address is H'FFA8 for TCSR
and H'FFA9 for TCNT.
15
15
Figure 13.5 Writing to TCNT and TCSR (WDT_0)
Section 13 Watchdog Timer (WDT)
8 7
H'5A
8 7
H'A5
Rev. 1.00 May 09, 2008 Page 359 of 954
0
Write data
0
Write data
REJ09B0462-0100
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