20.3
Register Descriptions
The LPC has the following registers.
Table 20.2 Register Configuration
Register Name
Host interface control register 0
Host interface control register 1
Host interface control register 2
Host interface control register 3
Host interface control register 4
Host interface control register 5
LPC channel 1 address register H
LPC channel 1 address register L
LPC channel 2 address register H
LPC channel 2 address register L
LPC channel 3 address register H
LPC channel 3 address register L
LPC channel 4 address register H
LPC channel 4 address register L
Input data register 1
Input data register 2
Input data register 3
Input data register 4
Output data register 1
Output data register 2
Output data register 3
Output data register 4
Status register 1
Status register 2
Status register 3
Status register 4
R/W
Abbreviation Slave Host
HICR0
R/W
HICR1
R/W
HICR2
R/W
HICR3
R
HICR4
R/W
HICR5
R/W
LADR1H
R/W
LADR1L
R/W
LADR2H
R/W
LADR2L
R/W
LADR3H
R/W
LADR3L
R/W
LADR4H
R/W
LADR4L
R/W
IDR1
R
IDR2
R
IDR3
R
IDR4
R
ODR1
R/W
ODR2
R/W
ODR3
R/W
ODR4
R/W
STR1
R/W
STR2
R/W
STR3
R/W
STR4
R/W
Rev. 1.00 May 09, 2008 Page 585 of 954
Section 20 LPC Interface (LPC)
Initial
Value Address
H'00
H'FE40
H'00
H'FE41
H'FE42
H'FE43
H'00
H'FDD9
H'00
H'FE33
H'00
H'FDC0
H'60
H'FDC1
H'00
H'FDC2
H'62
H'FDC3
H'00
H'FE34
H'00
H'FE35
H'00
H'FDD4
H'00
H'FDD5
W
H'00
H'FE38
W
H'00
H'FE3C
W
H'00
H'FE30
W
H'00
H'FDD6
R
H'00
H'FE39
R
H'00
H'FE3D
R
H'00
H'FE31
R
H'00
H'FDD7
R
H'00
H'FE3A
R
H'00
H'FE3E
R
H'00
H'FE32
R
H'00
H'FDD8
REJ09B0462-0100
Data Bus
Width
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8