Operation; Smbus 2.0 Data Format - Renesas H8S/2100 Series Hardware Manual

6-bit single-chip microcomputer
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Section 18 SMBus 2.0 Interface (SMBUS)
18.4

Operation

Transfer over the SMBUS is in the same format as transfer over the I
transferred after the last byte of data, enabling the detection of errors in received data.
18.4.1

SMBus 2.0 Data Format

Figure 18.2 is a schematic diagram of the SMBus 2.0 format.
The symbols used in figure 18.2 are explained in table 18.3.
(a) FS = 0 or FSX = 0
S
SLA
R/W
1
7
1
1
(b) Start condition retransmission FS = 0 or FSX = 0
S
SLA
R/W
1
7
1
1
SDA
SCL
1-7
S
SLA
Rev. 1.00 May 09, 2008 Page 550 of 954
REJ09B0462-0100
A
DATA
A
1
n
1
m
A
DATA
A/A
1
n1
1
m1
Figure 18.2 SMBus 2.0 Data Format
8
9
1-7
R/W
A
DATA
Figure 18.3 SMBus 2.0 Timing
PEC
A/A
P
8
1
1
S
SLA
R/W
A
1
7
1
1
1
Upper row: Transfer bit count (n1, n2 = 1 to 8)
Lower row: Transfer frame count (m1, m2 = from 1)
8
9
1-7
A
2
C bus interface. The PEC is
Transfer bit count
(n = 1 to 8)
Transfer frame count
(m = from 1)
A
PEC
A/A
DATA
1
8
1
n2
m2
8
9
PEC
A/A
P
P
1

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