Renesas H8S/2100 Series Hardware Manual page 535

6-bit single-chip microcomputer
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MST
TRS
BBSY ESTP
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0↓
0↓
1
0
1
0↓
0
[Legend]
0:
0-state retained
1:
1-state retained
—:
Previous state retained
0
:
Cleared to 0
1
:
Set to 1
STOP IRTR
AASX AL
0
1↑
0
0
0
0
0
0
0
0
0
0
0
0
1↑
0
0
0
0
1↑
0
0
0
Section 17 I
AAS
ADZ
ACKB ICDRF ICDRE State
0
0
1↑
0
0
0↓
0
0
1
0
0
0↓
0
0
1↑
0
0
0
0
Rev. 1.00 May 09, 2008 Page 509 of 954
2
C Bus Interface (IIC)
Reception end
with ICDRF=0
ICDR read with
the above state
Reception end
with ICDRF=1
ICDR read with
the above state
Automatic data
transfer from
ICDRS to
ICDRR with the
above state
Arbitration lost
0↓
Stop condition
detected
REJ09B0462-0100

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