Fsi Control Register 1 (Fsicr1) - Renesas H8S/2100 Series Hardware Manual

6-bit single-chip microcomputer
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Section 21 FSI Interface
21.3.1

FSI Control Register 1 (FSICR1)

The FSICR1 control bits are classified into three functionalities: resetting the FSI internal signals,
enabling/disabling FSI functions, and selecting FSI functions.
Bit
Bit Name
7
SRES
6
FSIE
5
FRDE
4
AAIE
Rev. 1.00 May 09, 2008 Page 652 of 954
REJ09B0462-0100
R/W
Initial
Value
EC
Host Description
R/W 
0
R/W 
0
R/W 
0
R/W 
0
Software Reset
Controls initialization of the FSI internal sequencer.
0: Normal state
1: Clears the internal sequencer.
Writing 1 to this bit generates a clear signal for the
sequencer in the corresponding module, resulting in
the initialization of the FSI's internal state.
FSI Enable
0: Disables FSI operation.
1: Enables FSI operation.
The following shows the initial state of the FSI pins
when FSIE is set to 1:
FSISS: Outputs high level.
FSICK: Outputs high level or low level depending on
DPHS and CPOS.
FSIDO: Outputs high level.
FSIDI: Inputs data.
Fast-Read Enable
0: The FSI is in normal read operation mode.
1: The FSI is in fast-read operation mode.
AAI (Auto Address Increment) Program Enable
0: The FSI performs byte-program operation.
1: The FSI performs AAI program operation.

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