Renesas H8S/2100 Series Hardware Manual page 87

6-bit single-chip microcomputer
Hide thumbs Also See for H8S/2100 Series:
Table of Contents

Advertisement

End of
exception
handling
Exception-handling state
RES = high
*1
Reset state
From any state, a transition to the reset state is made whenever the RES pin
Notes: 1.
goes low. A transition can also be made to the reset state when the watchdog timer overflows.
2.
The power-down state also includes watch mode. For details, refer to section 26, Power-Down Modes.
Program execution
state
SLEEP
instruction
with
LSON = 0,
PSS = 0, and
SSBY = 1
Request for
exception
handling
Interrupt
request
External interrupt
request
Figure 2.11 State Transitions
SLEEP
instruction
with
LSON = 0 and
SSBY = 0
Sleep mode
Software standby mode
*2
Power-down state
Rev. 1.00 May 09, 2008 Page 61 of 954
REJ09B0462-0100
Section 2 CPU

Advertisement

Table of Contents
loading

This manual is also suitable for:

H8s/2112r

Table of Contents