Renesas H8S/2100 Series Hardware Manual page 388

6-bit single-chip microcomputer

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Table of Contents

Section 14 Serial Communication Interface (SCI)

Clocked Synchronous Mode:

• Data length: 8 bits

• Receive error detection: Overrun errors

Smart Card Interface:

• An error signal can be automatically transmitted on detection of a parity error during reception.

• Data can be automatically re-transmitted on detection of an error signal during transmission.

• Both direct convention and inverse convention are supported.

Figure 14.1 shows a block diagram of SCI.

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Module data bus

Parity generation

Parity check

Receive shift register

Receive data register

Transmit shift register

Transmit data register

Serial mode register

Figure 14.1 Block Diagram of SCI

Transmission/

reception control

External clock

Serial control register

Serial status register

SCMR: Smart card mode register

Bit rate register