Table of Contents
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17.4.5 Slave Receive Operation....................................................................................... 531
17.4.6 Slave Transmit Operation ..................................................................................... 535
17.4.7 IRIC Setting Timing and SCL Control ................................................................. 538
17.4.8 Noise Canceler...................................................................................................... 540
17.4.9 Initialization of Internal State ............................................................................... 540
17.5 Interrupt Sources................................................................................................................ 542
17.6 Usage Notes ....................................................................................................................... 543
17.6.1 Module Stop Mode Setting ................................................................................... 546
Section 18 SMBus 2.0 Interface (SMBUS)....................................................... 547
18.1 Features.............................................................................................................................. 547
18.2 Input/Output Pins............................................................................................................... 548
18.3 Register Descriptions ......................................................................................................... 548
18.3.1 PEC Calculation Data Entry Register (PECX) ..................................................... 548
18.3.2 PEC Calculation Data Re-entry Register (PECY) ................................................ 549
18.3.3 PEC Calculation Result Output Register (PECZ)................................................. 549
18.4 Operation ........................................................................................................................... 550
18.4.1 SMBus 2.0 Data Format ....................................................................................... 550
18.4.2 Usage of PEC Calculation Module ....................................................................... 551
18.5 Usage Notes ....................................................................................................................... 552
18.5.1 Module Stop Mode Setting ................................................................................... 552
Section 19 Keyboard Buffer Control Unit (PS2) ..............................................553
19.1 Features.............................................................................................................................. 553
19.2 Input/Output Pins............................................................................................................... 555
19.3 Register Descriptions ......................................................................................................... 556
19.3.1 Keyboard Control Register 1 (KBCR1)................................................................ 557
19.3.2 Keyboard Buffer Control Register 2 (KBCR2) .................................................... 559
19.3.3 Keyboard Control Register H (KBCRH) .............................................................. 560
19.3.4 Keyboard Control Register L (KBCRL)............................................................... 562
19.3.5 Keyboard Data Buffer Register (KBBR) .............................................................. 564
19.3.6 Keyboard Buffer Transmit Data Register (KBTR)............................................... 564
19.4 Operation ........................................................................................................................... 565
19.4.1 Receive Operation ................................................................................................ 565
19.4.2 Transmit Operation ............................................................................................... 567
19.4.3 Receive Abort ....................................................................................................... 568
19.4.4 KCLKI and KDI Read Timing ............................................................................. 571
19.4.5 KCLKO and KDO Write Timing ......................................................................... 571
19.4.6 KBF Setting Timing and KCLK Control.............................................................. 572
19.4.7 Receive Timing..................................................................................................... 573
Rev. 1.00 May 09, 2008 Page xx of xxvi
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