Renesas H8S/2100 Series Hardware Manual page 648

6-bit single-chip microcomputer
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Section 20 LPC Interface (LPC)
Bit
Bit Name Initial Value Slave Host Description
3
IRQ9E4
0
2
IRQ6E4
0
Rev. 1.00 May 09, 2008 Page 622 of 954
REJ09B0462-0100
R/W
R/W
Host IRQ9 Interrupt Enable 4
Enables or disables an HIRQ9 interrupt request
when OBF4 is set by an ODR4 write.
0: HIRQ9 interrupt request by OBF4 and IRQE9E4 is
disabled.
[Clearing conditions]
Writing 0 to IRQ9E4
LPC hardware reset, LPC software reset
Clearing OBF4 to 0 (when IEDIR4 = 0)
1: [When IEDIR4 = 0]
HIRQ9 interrupt request by setting OBF4 to 1 is
enabled.
[When IEDIR4 = 1]
HIRQ9 interrupt is requested.
[Setting condition]
Writing 1 after reading IRQ9E4 = 0
R/W
Host IRQ6 Interrupt Enable 4
Enables or disables an HIRQ6 interrupt request
when OBF4 is set by an ODR4 write.
0: HIRQ6 interrupt request by OBF4 and IRQE6E4 is
disabled.
[Clearing conditions]
Writing 0 to IRQ6E4
LPC hardware reset, LPC software reset
Clearing OBF4 to 0 (when IEDIR4 = 0)
1: [When IEDIR4 = 0]
HIRQ6 interrupt request by setting OBF4 to 1 is
enabled.
[When IEDIR4 = 1]
HIRQ6 interrupt is requested.
[Setting condition]
Writing 1 after reading IRQ6E4 = 0

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