Table of Contents
Advertisement
Initialization
Start transmission/reception
Read TDRE flag in SSR
No
TDRE = 1
Write transmit data to TDR and
clear TDRE flag in SSR to 0
Read ORER flag in SSR
ORER = 1
Read RDRF flag in SSR
No
RDRF = 1
Read receive data in RDR, and
clear RDRF flag in SSR to 0
No
All data received
Clear TE and RE bits in SCR to 0
End transmission/reception
Notes: 1. When switching from transmit or receive operation to simultaneous transmit and receive
operations, first clear the TE bit and RE bit to 0, then set both these bits to 1 simultaneously.
2. Do not write to SMR, SCR, BRR, and SDCR from the start to the end of transmission/reception
except the process of [6].
Figure 14.20 Sample Flowchart of Simultaneous Serial Transmission and Reception
[1]
[2]
Yes
Yes
[3]
Error processing
No
[4]
Yes
[5]
Yes
[6]
Section 14 Serial Communication Interface (SCI)
[1] SCI initialization:
The TxD pin is designated as the
transmit data output pin, and the RxD pin
is designated as the receive data input
pin, enabling simultaneous transmit and
receive operations.
[2] SCI status check and transmit data write:
Read SSR and check that the TDRE flag
is set to 1, then write transmit data to
TDR and clear the TDRE flag to 0.
Transition of the TDRE flag from 0 to 1
can also be identified by a TXI interrupt.
[3] Receive error processing:
If a receive error occurs, read the ORER
flag in SSR, and after performing the
appropriate error processing, clear the
ORER flag to 0. Transmission/reception
cannot be resumed if the ORER flag is
set to 1.
[4] SCI status check and receive data read:
Read SSR and check that the RDRF flag
is set to 1, then read the receive data in
RDR and clear the RDRF flag to 0.
Transition of the RDRF flag from 0 to 1
can also be identified by an RXI
interrupt.
[5] Serial transmission/reception
continuation procedure:
To continue serial transmission/
reception, before the MSB (bit 7) of the
current frame is received, finish reading
the RDRF flag, reading RDR, and
clearing the RDRF flag to 0. Also, before
the MSB (bit 7) of the current frame is
transmitted, read 1 from the TDRE flag
to confirm that writing is possible. Then
write data to TDR and clear the TDRE
flag to 0.
Rev. 1.00 May 09, 2008 Page 407 of 954
REJ09B0462-0100
Advertisement
Table of Contents
