This LSI includes one unit (unit 0) of successive-approximation-type 10-bit A/D converter that
allows up to twelve analog input channels to be selected. Figure 22.1 shows a block diagram for
unit 0.
22.1
Features
• 10-bit resolution
• Input channels: Twelve channels
• Conversion cycle: 40 cycles (A/D conversion clock)
• Two kinds of operating modes
Single mode: Single-channel A/D conversion
Scan mode: Continuous A/D conversion on one to four channels or continuous A/D conversion
on one to eight channels
• A/D conversion clocks specifiable (φ, φ/2, φ/4, or φ/8)
• Eight data registers
Conversion results are held in a 16-bit data register for each channel
• Sample and hold function
• Three kinds of A/D conversion start
Software
Conversion start trigger from 16-bit timer pulse unit (TPU) or 8-bit timer (TMR)
• Interrupt source
A/D conversion end interrupt (ADI) request can be generated
Section 22 A/D Converter
Section 22 A/D Converter
Rev. 1.00 May 09, 2008 Page 693 of 954
REJ09B0462-0100