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Section 2 CPU
The memory indirect addressing mode (@@aa:8) employed in the JMP and JSR instructions
uses an 8-bit absolute address included in the instruction code to specify a memory operand
that contains a branch address. The operand is a 32-bit (longword), providing a 32-bit branch
address. The upper 8 bits of these 32 bits is a reserved area that is regarded as H'00. Branch
addresses can be stored in the area from H'00000000 to H'000000FF. Note that the first part of
this range is also used for the exception handling vector table.
• Stack Structure
Figure 2.4 shows the stack structure when the program counter (PC) is pushed onto the stack in
a subroutine call and the stack structure when PC, condition-code register (CCR), and
extended control register (EXR) are pushed onto the stack in exception handling. When EXR
is not pushed onto the stack in interrupt control mode 0. For details on the interrupt control
mode, see section 5, Exception Handling.
SP
Notes: 1. When EXR is not used it is not stored on the stack.
2. SP when EXR is not used.
3. Ignored when returning.
Rev. 1.00 May 09, 2008 Page 32 of 954
REJ09B0462-0100
Reserved
PC
(24 bits)
(a) Subroutine Branch
Figure 2.2 Stack Structure
SP
EXR*
Reserved*
2
*
(SP
)
CCR
PC
(24 bits)
(b) Exception Handling
1
, *
1
3
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