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Section 19 Keyboard Buffer Control Unit (PS2)
19.3
Register Descriptions
The PS2 has the following registers for each channel.
Table 19.2 Register Configuration
Channel
Register Name
Channel 0
Keyboard control register 1_0
Keyboard control register 2_0
Keyboard buffer transmit data
register_0
Keyboard control register H_0
Keyboard control register L_0
Keyboard data buffer register_0 KBBR_0
Channel 1
Keyboard control register 1_1
Keyboard control register 2_1
Keyboard buffer transmit data
register_1
Keyboard control register H_1
Keyboard control register L_1
Keyboard data buffer register_1 KBBR_1
Rev. 1.00 May 09, 2008 Page 556 of 954
REJ09B0462-0100
Abbreviation
R/W
KBCR1_0
R/W
KBCR2_0
R/W
KBTR_0
R/W
KBCRH_0
R/W
KBCRL_0
R/W
R
KBCR1_1
R/W
KBCR2_1
R/W
KBTR_1
R/W
KBCRH_1
R/W
KBCRL_1
R/W
R
Initial
Data Bus
Value Address
Width
H'00
H'FEC0 8
H'F0
H'FEDB 8
H'FF
H'FEC1 8
H'70
H'FED8 8
H'70
H'FED9 8
H'00
H'FEDA 8
H'00
H'FEC2 8
H'F0
H'FEDF 8
H'FF
H'FEC3 8
H'70
H'FEDC 8
H'70
H'FEDD 8
H'00
H'FEDE 8
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