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P4n input
P6n input
PCn input
PGn input
1 expected
P4n input
P6n input
PCn input
PGn input
0 expected
P4n input
P6n input
PCn input
PGn input
(n = 7 to 0)
Figure 8.2 Schematic View of Noise Cancel Operation
Port Nch-OD Control Register (PnNOCR) (n = C, D, F, G, and H)
8.1.9
The individual bits of NOCR specify output driver type for the pins of port n that is specified as
output. The upper two bits in PHNOCR are reserved.
Bit
Bit Name
7
Pn7NOCR
6
Pn6NOCR
5
Pn5NOCR
4
Pn4NOCR
3
Pn3NOCR
2
Pn2NOCR
1
Pn1NOCR
0
Pn0NOCR
Initial Value
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
Description
Ports C, D, F, and H:
0: CMOS
(P-channel driver is enabled)
1: N channel open-drain
(P-channel driver is disabled)
Port G:
0: NMOS push-pull output
(N-channel driver at Vcc is enabled)
1: N channel open-drain
(N-channel driver at Vcc is disabled)
Rev. 1.00 May 09, 2008 Page 163 of 954
Section 8 I/O Ports
REJ09B0462-0100
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