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Section 26 Power-Down Modes
26.7
Module Stop Mode
Module stop mode can be individually set for each on-chip peripheral module.
When the corresponding MSTP bit in MSTPCR is set to 1, module operation stops at the end of
the bus cycle and a transition is made to module stop mode. In turn, when the corresponding
MSTP bit is cleared to 0, module stop mode is cleared and module operation resumes at the end of
the bus cycle. In module stop mode, the internal states of some on-chip peripheral modules are
retained.
After the reset state is cancelled, all on-chip peripheral modules are in module stop mode.
While an on-chip peripheral module is in module stop mode, its registers cannot be read from or
written to.
26.8
Usage Notes
26.8.1
I/O Port Status
The status of the I/O ports is retained in software standby mode. Therefore, while a high level is
output or the pull-up MOS is on, the current consumption is not reduced by the amount of current
to support the high level output.
26.8.2
Current Consumption when Waiting for Oscillation Stabilization
The current consumption increases during oscillation stabilization.
Rev. 1.00 May 09, 2008 Page 824 of 954
REJ09B0462-0100
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