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3. If no error signal is returned from the receiving end, the ERS bit in SSR is not set to 1. In this
case, one frame of data is determined to have been transmitted including re-transfer, and the
TEND bit in SSR is set to 1. Here, a TXI interrupt request is generated if the TIE bit in SCR is
set to 1. Writing transmit data to TDR starts transmission of the next data.
Figure 14.28 shows a sample flowchart for transmission. In transmission, the TEND and TDRE
flags in SSR are simultaneously set to 1, thus generating a TXI interrupt request when TIE in SCR
is set. If an error occurs, the SCI automatically re-transmits the same data. During re-transmission,
TEND remains 0. Therefore, the SCI automatically transmit the specified number of bytes,
including re-transmission in the case of error. However, the ERS flag is not automatically cleared;
the ERS flag must be cleared by previously setting the RIE bit to 1 to enable an ERI interrupt
request to be generated at error occurrence.
nth transfer frame
Ds
D0 D1 D2 D3 D4 D5 D6 D7 Dp DE
TDRE
Transfer from TDR to TSR
TEND
FER/ERS
Figure 14.26 Data Re-transfer Operation in SCI Transmission Mode
Section 14 Serial Communication Interface (SCI)
Retransfer frame
Ds D0 D1 D2 D3 D4 D5 D6 D7 Dp
Transfer from TDR to TSR
[2]
[1]
Rev. 1.00 May 09, 2008 Page 413 of 954
(n + 1) th
transfer frame
(DE)
Ds D0 D1 D2 D3 D4
Transfer from TDR to TSR
[3]
[3]
REJ09B0462-0100
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